From 9df969aebfdeb6d162cd2aeb288fa4420a21953a Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Tue, 25 Jul 2017 18:46:46 -0600 Subject: soc/amd/common: Convert to C_ENVIRONMENT_BOOTBLOCK Add dedicated CAR setup and teardown functions and Kconfig options to force their inclusion into the build. The .S files are mostly duplicated code from the old cache_as_ram.inc file. The .S files use global proc names in anticipation for use with the Kconfig symbols C_ENVIRONMENT_BOOTBLOCK and POSTCAR_STAGE. Move the mainboard romstage functionality into the soc directory and change the function name to be compatible with the call from assembly_entry.S. Drop the BIST check like other devices. Move InitReset and InitEarly to bootblock. These AGESA entry points set some default settings, and release/recapture the AP cores. There are currently some early dependencies on InitReset. Future work should include: * Pull the necessary functionality from InitReset into bootblock * Move InitReset and InitEarly to car_stage_entry() and out of bootblock - Add a mechanism for the BSP to give the APs an address to call and skip most of bootblock and verstage (when available) (1) - Reunify BiosCallOuts.c and OemCustomize.c (1) During the InitReset call, the BSP enables the APs by setting core enable bits in F18F0x1DC and APs begin fetching/executing from the reset vector. The BSP waits for all APs to also reach InitReset, where they enter an endless loop. The BSP sends a command to them to execute a HLT instruction and the BSP eventually returns from InitReset. The goal would be to preserve this process but prevent APs from rerunning early code. Change-Id: I811c7ef875b980874f3c4b1f234f969ae5618c44 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/19755 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Martin Roth --- src/soc/amd/stoneyridge/Kconfig | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'src/soc/amd/stoneyridge/Kconfig') diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 8d534cd6ac..aa694ef07b 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -40,10 +40,14 @@ config CPU_SPECIFIC_OPTIONS select TSC_CONSTANT_RATE select SPI_FLASH if HAVE_ACPI_RESUME select TSC_SYNC_LFENCE + select COLLECT_TIMESTAMPS select SOC_AMD_PI select SOC_AMD_COMMON select SOC_AMD_COMMON_BLOCK select SOC_AMD_COMMON_BLOCK_PSP + select SOC_AMD_COMMON_BLOCK_CAR + select C_ENVIRONMENT_BOOTBLOCK + select BOOTBLOCK_CONSOLE config UDELAY_LAPIC_FIXED_FSB int @@ -61,6 +65,14 @@ config DCACHE_RAM_SIZE hex default 0x10000 +config DCACHE_BSP_STACK_SIZE + depends on C_ENVIRONMENT_BOOTBLOCK + hex + default 0x4000 + help + The amount of anticipated stack usage in CAR by bootblock and + other stages. + config CPU_ADDR_BITS int default 48 @@ -124,10 +136,6 @@ config RAMBASE hex default 0x200000 -config BOOTBLOCK_SOUTHBRIDGE_INIT - string - default "soc/amd/stoneyridge/bootblock/bootblock.c" - config SOUTHBRIDGE_AMD_STONEYRIDGE_SKIP_ISA_DMA_INIT bool default n -- cgit v1.2.3