From 469c01ebd2ae0464d469496ecf156b4559a3f506 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Sun, 24 Sep 2017 21:04:03 -0600 Subject: amd/stoneyridge: Refactor GPIO functions Refactor the GPIO functions to use GPIO numbers. This is more consistent with other GPIO code in coreboot. BUG=b:66462235 BRANCH=none TEST=Build and boot Kahlee Change-Id: I6d6af7f6a0ed9ba1230342e1ca024535c4f34d47 Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/21684 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/gpio.c | 34 ++++++++++++++++++++++++++-------- 1 file changed, 26 insertions(+), 8 deletions(-) (limited to 'src/soc/amd/stoneyridge/gpio.c') diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index 7e19d996ff..86655fceb4 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -16,26 +16,40 @@ */ #include +#include #include #include -/* The following functions must be implemented by SoC/board code. */ +static uintptr_t gpio_get_address(gpio_t gpio_num) +{ + uintptr_t gpio_address; + + if (gpio_num < 64) + gpio_address = GPIO_BANK0_CONTROL(gpio_num); + else if (gpio_num < 128) + gpio_address = GPIO_BANK1_CONTROL(gpio_num); + else + gpio_address = GPIO_BANK2_CONTROL(gpio_num); + + return gpio_address; +} int gpio_get(gpio_t gpio_num) { uint32_t reg; + uintptr_t gpio_address = gpio_get_address(gpio_num); - reg = read32((void *)(uintptr_t)gpio_num); + reg = read32((void *)gpio_address); return !!(reg & GPIO_PIN_STS); } - void gpio_set(gpio_t gpio_num, int value) { uint32_t reg; + uintptr_t gpio_address = gpio_get_address(gpio_num); - reg = read32((void *)(uintptr_t)gpio_num); + reg = read32((void *)gpio_address); reg &= ~GPIO_OUTPUT_MASK; reg |= !!value << GPIO_OUTPUT_SHIFT; write32((void *)(uintptr_t)gpio_num, reg); @@ -44,8 +58,9 @@ void gpio_set(gpio_t gpio_num, int value) void gpio_input_pulldown(gpio_t gpio_num) { uint32_t reg; + uintptr_t gpio_address = gpio_get_address(gpio_num); - reg = read32((void *)(uintptr_t)gpio_num); + reg = read32((void *)gpio_address); reg &= ~GPIO_PULLUP_ENABLE; reg |= GPIO_PULLDOWN_ENABLE; write32((void *)(uintptr_t)gpio_num, reg); @@ -54,8 +69,9 @@ void gpio_input_pulldown(gpio_t gpio_num) void gpio_input_pullup(gpio_t gpio_num) { uint32_t reg; + uintptr_t gpio_address = gpio_get_address(gpio_num); - reg = read32((void *)(uintptr_t)gpio_num); + reg = read32((void *)gpio_address); reg &= ~GPIO_PULLDOWN_ENABLE; reg |= GPIO_PULLUP_ENABLE; write32((void *)(uintptr_t)gpio_num, reg); @@ -64,8 +80,9 @@ void gpio_input_pullup(gpio_t gpio_num) void gpio_input(gpio_t gpio_num) { uint32_t reg; + uintptr_t gpio_address = gpio_get_address(gpio_num); - reg = read32((void *)(uintptr_t)gpio_num); + reg = read32((void *)gpio_address); reg &= ~GPIO_OUTPUT_ENABLE; write32((void *)(uintptr_t)gpio_num, reg); } @@ -73,8 +90,9 @@ void gpio_input(gpio_t gpio_num) void gpio_output(gpio_t gpio_num, int value) { uint32_t reg; + uintptr_t gpio_address = gpio_get_address(gpio_num); - reg = read32((void *)(uintptr_t)gpio_num); + reg = read32((void *)gpio_address); reg |= GPIO_OUTPUT_ENABLE; write32((void *)(uintptr_t)gpio_num, reg); } -- cgit v1.2.3