From 31c8cdda73461f59a29457e482934cd686feed39 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Thu, 9 Nov 2017 12:23:47 -0700 Subject: soc/amd/stoneyridge: Add GNVS variables for thermal control BUG=b:67999819 Change-Id: I78db830c14092f5e918657e62bf38ab7124b1646 Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/22398 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Marshall Dawson --- src/soc/amd/stoneyridge/include/soc/nvs.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src/soc/amd/stoneyridge/include') diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h index 623c554057..b4f7213eca 100644 --- a/src/soc/amd/stoneyridge/include/soc/nvs.h +++ b/src/soc/amd/stoneyridge/include/soc/nvs.h @@ -44,7 +44,13 @@ typedef struct global_nvs_t { uint32_t prt0; /* 0x25 - 0x28 - PERST_0 Address */ uint8_t scdp; /* 0x29 - SD_CD GPIO portid */ uint8_t scdo; /* 0x2A - GPIO pad offset relative to the community */ - uint8_t unused[213]; + uint8_t tmps; /* 0x2B - Temperature Sensor ID */ + uint8_t tlvl; /* 0x2C - Throttle Level Limit */ + uint8_t flvl; /* 0x2D - Current FAN Level */ + uint8_t tcrt; /* 0x2E - Critical Threshold */ + uint8_t tpsv; /* 0x2F - Passive Threshold */ + uint8_t tmax; /* 0x30 - CPU Tj_max */ + uint8_t unused[207]; /* ChromeOS specific (0x100 - 0xfff) */ chromeos_acpi_t chromeos; -- cgit v1.2.3