From dd9b1d1dd5e8418d1c86984b55bb9b535d5d8f64 Mon Sep 17 00:00:00 2001 From: Richard Spiegel Date: Thu, 20 Sep 2018 14:50:11 -0700 Subject: soc/amd/stoneyridge/romstage.c: Move STAPM code to SOC specific STAPM programming was created inside function OemCustomizeInitEarly(). It should be SOC specific, and called by agesawrapper just before the call to OemCustomizeInitEarly(). BUG=b:116196626 TEST=build and boot grunt Change-Id: I8a2e51abda11a9d60a9057b38f2a484e1c8c9047 Signed-off-by: Richard Spiegel Reviewed-on: https://review.coreboot.org/28705 Reviewed-by: Martin Roth Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/romstage.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'src/soc/amd/stoneyridge/romstage.c') diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index de2219140c..a5acaf6f05 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -222,3 +222,26 @@ void SetMemParams(AMD_POST_PARAMS *PostParams) break; } } + +void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly) +{ + const struct soc_amd_stoneyridge_config *cfg; + const struct device *dev = dev_find_slot(0, GNB_DEVFN); + struct _PLATFORM_CONFIGURATION *platform; + + if (!dev || !dev->chip_info) { + printk(BIOS_WARNING, "Warning: Cannot find SoC devicetree" + " config, STAPM unchanged\n"); + return; + } + cfg = dev->chip_info; + platform = &InitEarly->PlatformConfig; + if ((cfg->stapm_percent) && (cfg->stapm_time) && (cfg->stapm_power)) { + platform->PlatStapmConfig.CfgStapmScalar = cfg->stapm_percent; + platform->PlatStapmConfig.CfgStapmTimeConstant = + cfg->stapm_time; + platform->PkgPwrLimitDC = cfg->stapm_power; + platform->PkgPwrLimitAC = cfg->stapm_power; + platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled; + } +} -- cgit v1.2.3