From 029d997b6eb0c784b844bf554dec5c33286b6507 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 23 Apr 2021 12:22:59 -0600 Subject: amd/cezanne: Add slow_ppt_time & thermctl_limit to UPD These values will be added in the upcoming STAPM configuration update. BUG=b:185209734 TEST=Build & Boot guybrush Cq-Depend: chrome-internal:3780259 Signed-off-by: Martin Roth Change-Id: I2a6835c16badfe505e3c33b356ca671766cd6972 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52648 Tested-by: build bot (Jenkins) Reviewed-by: Eric Peers Reviewed-by: chris wang Reviewed-by: Raul Rangel --- src/soc/amd/cezanne/chip.h | 2 ++ src/soc/amd/cezanne/fsp_m_params.c | 2 ++ 2 files changed, 4 insertions(+) (limited to 'src/soc/amd') diff --git a/src/soc/amd/cezanne/chip.h b/src/soc/amd/cezanne/chip.h index 7753ab8623..4c5118e914 100644 --- a/src/soc/amd/cezanne/chip.h +++ b/src/soc/amd/cezanne/chip.h @@ -55,6 +55,8 @@ struct soc_amd_cezanne_config { uint32_t sustained_power_limit; uint32_t fast_ppt_limit; uint32_t slow_ppt_limit; + uint32_t slow_ppt_time_constant_s; + uint32_t thermctl_limit_degreeC; uint8_t smartshift_enable; diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c index a83b8b2f57..964ec1880c 100644 --- a/src/soc/amd/cezanne/fsp_m_params.c +++ b/src/soc/amd/cezanne/fsp_m_params.c @@ -98,6 +98,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) mcfg->sustained_power_limit = config->sustained_power_limit; mcfg->fast_ppt_limit = config->fast_ppt_limit; mcfg->slow_ppt_limit = config->slow_ppt_limit; + mcfg->slow_ppt_time_constant = config->slow_ppt_time_constant_s; + mcfg->thermctl_limit = config->thermctl_limit_degreeC; /* 0 is default */ mcfg->smartshift_enable = config->smartshift_enable; -- cgit v1.2.3