From 383ef6eef88fb285b3ba07a5d935e9285398b3fe Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Fri, 27 Oct 2017 17:12:43 -0600 Subject: amd/stoneyridge: Remove duplicate LPC decode setup Delete the LPC I/O decode configuration from fixme.c. This code is superseded by early_setup.c. Change-Id: I86ac5e997c98fea853659bc66b13128f0872f571 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22246 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones Reviewed-by: Aaron Durbin --- src/soc/amd/stoneyridge/fixme.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/stoneyridge/fixme.c b/src/soc/amd/stoneyridge/fixme.c index d3f5f6c919..60cc2d14cb 100644 --- a/src/soc/amd/stoneyridge/fixme.c +++ b/src/soc/amd/stoneyridge/fixme.c @@ -66,8 +66,6 @@ void amd_initcpuio(void) void amd_initmmio(void) { UINT64 MsrReg; - UINT32 PciData; - PCI_ADDR PciAddress; AMD_CONFIG_PARAMS StdHeader; /* @@ -79,11 +77,6 @@ void amd_initmmio(void) | 1; LibAmdMsrWrite(0xc0010058, &MsrReg, &StdHeader); - /* For serial port */ - PciData = 0xff03ffd5; - PciAddress.AddressValue = MAKE_SBDFO(0, 0, PCU_DEV, LPC_FUNC, 0x44); - LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); - /* Set ROM cache onto WP to decrease post time */ MsrReg = (0x0100000000ull - CACHE_ROM_SIZE) | 5ull; LibAmdMsrWrite(0x20c, &MsrReg, &StdHeader); -- cgit v1.2.3