From 7176a54c2b4c1a95219c5ab9e7b7b12a8ab6b0e2 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Fri, 13 Dec 2019 17:08:49 +0100 Subject: Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This reverts commit 01787608670adec26fcea48173e18395e51c790e. AMD: Dropping the _HID of PCI root bus doesn't work well and people started to notice the breakage. Intel: These platforms have a devicetree switch to choose between PCI and ACPI modes. In the former case we need _ADR, but in the latter _HID as the PCI devices are hidden. The conflicting use of _ADR and _HID still needs to be fixed before we can bump our IASL version. Change-Id: If7b52b9e8f2f53574849aa3fddfccfa016288179 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/37710 Reviewed-by: HAOUAS Elyes Reviewed-by: Kyösti Mälkki Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/acpi/northbridge.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/amd') diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl index 09bf2e18c2..fe78534403 100644 --- a/src/soc/amd/stoneyridge/acpi/northbridge.asl +++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl @@ -17,7 +17,7 @@ /* Note: Only need HID on Primary Bus */ External (TOM1) External (TOM2) -/* Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge */ +Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ -- cgit v1.2.3