From aa8f165b49484561a7e77e562521d7c2a3b8ce3f Mon Sep 17 00:00:00 2001
From: Aaron Durbin <adurbin@chromium.org>
Date: Mon, 17 Aug 2020 17:41:28 -0600
Subject: soc/amd/picasso: log and print GPIO wake events

Capture the GPIO subsystem wake state and add events to
the eventlog.

BUG=b:159947207

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: I7f10bf4599ea7928cc87b6b10ac11a7c30e58406
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44535
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
 src/soc/amd/picasso/include/soc/acpi.h |  8 ++++++++
 src/soc/amd/picasso/romstage.c         |  8 +++++---
 src/soc/amd/picasso/southbridge.c      | 13 ++++++++-----
 3 files changed, 21 insertions(+), 8 deletions(-)

(limited to 'src/soc/amd')

diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h
index 09f60d7280..a21d3477bb 100644
--- a/src/soc/amd/picasso/include/soc/acpi.h
+++ b/src/soc/amd/picasso/include/soc/acpi.h
@@ -4,6 +4,8 @@
 #define __SOC_PICASSO_ACPI_H__
 
 #include <acpi/acpi.h>
+#include <amdblocks/acpi.h>
+#include <amdblocks/gpio_banks.h>
 
 unsigned long southbridge_write_acpi_tables(const struct device *device,
 		unsigned long current, struct acpi_rsdp *rsdp);
@@ -13,4 +15,10 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current
 
 const char *soc_acpi_name(const struct device *dev);
 
+/* Object to capture state of chipset for logging events. */
+struct chipset_state {
+	struct acpi_pm_gpe_state gpe_state;
+	struct gpio_wake_state gpio_state;
+};
+
 #endif /* __SOC_PICASSO_ACPI_H__ */
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 5a9f051968..342fd467ec 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -11,22 +11,24 @@
 #include <console/console.h>
 #include <program_loading.h>
 #include <elog.h>
+#include <soc/acpi.h>
 #include <soc/memmap.h>
 #include <soc/mrc_cache.h>
 #include <types.h>
 #include "chip.h"
 #include <fsp/api.h>
 
-static struct acpi_pm_gpe_state chipset_state;
+static struct chipset_state chipset_state;
 
 static void fill_chipset_state(void)
 {
-	acpi_fill_pm_gpe_state(&chipset_state);
+	acpi_fill_pm_gpe_state(&chipset_state.gpe_state);
+	gpio_fill_wake_state(&chipset_state.gpio_state);
 }
 
 static void add_chipset_state_cbmem(int unused)
 {
-	struct acpi_pm_gpe_state *state;
+	struct chipset_state *state;
 
 	state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state));
 
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c
index 61dc341f1b..2a5f822b8f 100644
--- a/src/soc/amd/picasso/southbridge.c
+++ b/src/soc/amd/picasso/southbridge.c
@@ -18,6 +18,7 @@
 #include <amdblocks/lpc.h>
 #include <amdblocks/acpi.h>
 #include <amdblocks/spi.h>
+#include <soc/acpi.h>
 #include <soc/cpu.h>
 #include <soc/i2c.h>
 #include <soc/southbridge.h>
@@ -274,7 +275,7 @@ static void sb_init_acpi_ports(void)
 
 static void set_nvs_sws(void *unused)
 {
-	struct acpi_pm_gpe_state *state;
+	struct chipset_state *state;
 	struct global_nvs *gnvs;
 
 	state = cbmem_find(CBMEM_ID_POWER_STATE);
@@ -284,7 +285,7 @@ static void set_nvs_sws(void *unused)
 	if (gnvs == NULL)
 		return;
 
-	acpi_fill_gnvs(gnvs, state);
+	acpi_fill_gnvs(gnvs, &state->gpe_state);
 }
 
 BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, set_nvs_sws, NULL);
@@ -308,14 +309,16 @@ static void al2ahb_clock_gate(void)
 
 void southbridge_init(void *chip_info)
 {
-	struct acpi_pm_gpe_state *state;
+	struct chipset_state *state;
 
 	i2c_soc_init();
 	sb_init_acpi_ports();
 
 	state = cbmem_find(CBMEM_ID_POWER_STATE);
-	if (state)
-		acpi_pm_gpe_add_events_print_events(state);
+	if (state) {
+		acpi_pm_gpe_add_events_print_events(&state->gpe_state);
+		gpio_add_events(&state->gpio_state);
+	}
 	acpi_clear_pm_gpe_status();
 
 	al2ahb_clock_gate();
-- 
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