From 99d39565da77056699ea011e82483092ec650153 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Mon, 2 Mar 2015 14:38:37 -0800 Subject: google/purin: add DMA coherent region BUG=none BRANCH=broadcom-firmware TEST=boot to depthcharge Change-Id: Id10437c12e219e07121395abd442d53b3b56c7be Signed-off-by: Patrick Georgi Original-Commit-Id: f33e9218ca8df1d149761c09253c30837b607433 Original-Signed-off-by: Daisuke Nojiri Original-Reviewed-on: https://chrome-internal-review.googlesource.com/204757 Original-Reviewed-by: Julius Werner Original-Commit-Queue: Daisuke Nojiri Original-Tested-by: Daisuke Nojiri Original-Change-Id: I93def9c326cc8b4fea69078987bddf09d9f2a797 Original-Reviewed-on: https://chromium-review.googlesource.com/256417 Reviewed-on: http://review.coreboot.org/9854 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/broadcom/cygnus/include/soc/memlayout.ld | 1 + src/soc/broadcom/cygnus/include/soc/sdram.h | 3 +++ 2 files changed, 4 insertions(+) (limited to 'src/soc/broadcom/cygnus/include') diff --git a/src/soc/broadcom/cygnus/include/soc/memlayout.ld b/src/soc/broadcom/cygnus/include/soc/memlayout.ld index 542174bf02..6342810929 100644 --- a/src/soc/broadcom/cygnus/include/soc/memlayout.ld +++ b/src/soc/broadcom/cygnus/include/soc/memlayout.ld @@ -42,4 +42,5 @@ SECTIONS DRAM_START(0x60000000) RAMSTAGE(0x60000000, 128K) POSTRAM_CBFS_CACHE(0x60100000, 1M) + DMA_COHERENT(0x60200000, 2M) } diff --git a/src/soc/broadcom/cygnus/include/soc/sdram.h b/src/soc/broadcom/cygnus/include/soc/sdram.h index 673d3d4f40..c7d6383e58 100644 --- a/src/soc/broadcom/cygnus/include/soc/sdram.h +++ b/src/soc/broadcom/cygnus/include/soc/sdram.h @@ -20,7 +20,10 @@ #ifndef __SOC_BROADCOM_CYGNUS_SDRAM_H__ #define __SOC_BROADCOM_CYGNUS_SDRAM_H__ +#include + void ddr_init2(void); void sdram_init(void); +uint32_t sdram_size_mb(void); #endif /* __SOC_BROADCOM_CYGNUS_SDRAM_H__ */ -- cgit v1.2.3