From 2d510d01d1eb45af0f8ba2b060748c465243c099 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Mon, 29 Sep 2014 12:43:40 -0700 Subject: urara: use proper SOC name Danube has become Pistachio, let's rename all instances where this SOC is mentioned. BUG=none TEST=board urara still builds Change-Id: Iea91419121eb6ab5665c2f9f95e82f461905268e Signed-off-by: Patrick Georgi Original-Commit-Id: 58696cc7c77a70dca2bfd512d695d143e1097a78 Original-Change-Id: Ie5ede401c4f69ed5d832a9eabac008eeac6db62d Original-Signed-off-by: Vadim Bendebury Original-Reviewed-on: https://chromium-review.googlesource.com/220401 Original-Reviewed-by: Andrew Bresticker Reviewed-on: http://review.coreboot.org/9048 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/imgtec/pistachio/Kconfig | 73 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 src/soc/imgtec/pistachio/Kconfig (limited to 'src/soc/imgtec/pistachio/Kconfig') diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig new file mode 100644 index 0000000000..1acfe39a8c --- /dev/null +++ b/src/soc/imgtec/pistachio/Kconfig @@ -0,0 +1,73 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2014 Imagination Technologies +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; version 2 of +# the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +config CPU_IMGTEC_PISTACHIO + select CPU_MIPS + select DYNAMIC_CBMEM + select GENERIC_UDELAY + select HAVE_MONOTONIC_TIMER + select HAVE_UART_MEMORY_MAPPED + select HAVE_UART_SPECIAL + bool + +if CPU_IMGTEC_PISTACHIO + +config BOOTBLOCK_CPU_INIT + string + default "soc/imgtec/pistachio/bootblock.c" + +config BOOTBLOCK_BASE + hex + default 0x9b000000 + +config CBFS_ROM_OFFSET + # Effectively the maximum size of the bootblock + hex + default 0x4000 + +config ROMSTAGE_BASE + hex + default 0x9b004000 + help + The address where romstage is supposed to be loaded, right above the + bootblock. + +config CBMEM_CONSOLE_PRERAM_BASE + hex "memory address of the CBMEM console buffer" + default 0x9b00f800 + help + Allocate 4KB to the pre-ram console buffer, we should be able to use + GRAM eventually and have a much larger buffer. + +config BOOTBLOCK_STACK_BOTTOM + hex + default 0x9b00e000 + help + This allocates 6KB of stack space. One needs to verify that this is + sufficient. + +config BOOTBLOCK_STACK_TOP + hex + default CBMEM_CONSOLE_PRERAM_BASE + help + Bootblock stack starts immediately under the CBMEM console buffer, + stack location might be changed by romstage. +endif -- cgit v1.2.3