From ccd8700cac9bda4229ba5628e6f51ab0b96fde41 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 8 Mar 2017 17:55:26 +0530 Subject: soc/intel/apollolake: Use common PCR module This patch use common PCR library to perform CRRd and CRWr operation using Port Ids, define inside soc/pcr_ids.h Change-Id: Iacbf58dbd55bf3915676d875fcb484362d357a44 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/18673 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/Kconfig | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/apollolake/Kconfig') diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 70d2099605..c1ce9d729e 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -18,6 +18,7 @@ config CPU_SPECIFIC_OPTIONS # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select IOAPIC + select PCR_COMMON_IOSF_1_0 select SMP select SSE2 select SUPPORT_CPU_UCODE_IN_CBFS @@ -52,6 +53,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_ACPI select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK + select SOC_INTEL_COMMON_BLOCK_PCR select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_LPSS_I2C select SOC_INTEL_COMMON_SMI @@ -91,9 +93,11 @@ config SOC_INTEL_COMMON_RESET bool default y -config IOSF_BASE_ADDRESS - hex "MMIO Base Address of sideband bus" +config PCR_BASE_ADDRESS + hex default 0xd0000000 + help + This option allows you to select MMIO Base Address of sideband bus. config DCACHE_RAM_BASE hex "Base address of cache-as-RAM" -- cgit v1.2.3