From 1bd0c0c4971ce50426cbe18e93e2ec9dca320af1 Mon Sep 17 00:00:00 2001
From: Lance Zhao <lijian.zhao@intel.com>
Date: Tue, 19 Apr 2016 18:04:21 -0700
Subject: soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS
 builds

Add chromeos required GNVS feature. The GNVS table stays in both CBMEM
and ACPI DSDT tables.

Change-Id: I4db0eb18d2de62917a94704318a7896c04e4777f
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14471
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/soc/intel/apollolake/acpi.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

(limited to 'src/soc/intel/apollolake/acpi.c')

diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 7d28313084..a5d1dfa080 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -16,12 +16,15 @@
  */
 
 #include <arch/acpi.h>
+#include <arch/acpigen.h>
 #include <arch/ioapic.h>
 #include <arch/smp/mpspec.h>
+#include <cbmem.h>
 #include <cpu/x86/smm.h>
 #include <soc/acpi.h>
 #include <soc/iomap.h>
 #include <soc/pm.h>
+#include <soc/nvs.h>
 
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
@@ -125,3 +128,29 @@ unsigned long southbridge_write_acpi_tables(device_t device,
 {
 	return acpi_write_hpet(device, current, rsdp);
 }
+
+static void acpi_create_gnvs(struct global_nvs_t *gnvs)
+{
+	if (IS_ENABLED(CONFIG_CHROMEOS)) {
+		/* Initialize Verified Boot data */
+		chromeos_init_vboot(&gnvs->chromeos);
+		gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO;
+	}
+}
+
+void southbridge_inject_dsdt(device_t device)
+{
+	struct global_nvs_t *gnvs;
+
+	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
+
+	if (gnvs) {
+		acpi_create_gnvs(gnvs);
+		acpi_save_gnvs((uintptr_t)gnvs);
+
+		/* Add it to DSDT.  */
+		acpigen_write_scope("\\");
+		acpigen_write_name_dword("NVSA", (uintptr_t)gnvs);
+		acpigen_pop_len();
+	}
+}
-- 
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