From 7952e283fb6dac19a10112199814c80619a28366 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 14 Mar 2017 18:26:27 +0530 Subject: soc/intel/apollolake: Clean up code by using common System Agent module This patch currently contains the SA initialization required for bootblock phase - 1. Use SOC_INTEL_COMMON_BLOCK_SA kconfig for common SA code. 2. Perform PCIEXBAR programming based on soc configurable PCIEX_LENGTH_xxxMB 3. Use common systemagent header file. Change-Id: I01a24e2d4f1c8c9ca113c128bb6b3eac23dc79ad Signed-off-by: Barnali Sarkar Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/18567 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/include/soc/northbridge.h | 40 ---------------------- src/soc/intel/apollolake/include/soc/systemagent.h | 32 +++++++++++++++++ 2 files changed, 32 insertions(+), 40 deletions(-) delete mode 100644 src/soc/intel/apollolake/include/soc/northbridge.h create mode 100644 src/soc/intel/apollolake/include/soc/systemagent.h (limited to 'src/soc/intel/apollolake/include') diff --git a/src/soc/intel/apollolake/include/soc/northbridge.h b/src/soc/intel/apollolake/include/soc/northbridge.h deleted file mode 100644 index 04e369e7e8..0000000000 --- a/src/soc/intel/apollolake/include/soc/northbridge.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Intel Corp. - * (Written by Andrey Petrov for Intel Corp.) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _SOC_APOLLOLAKE_NORTHBRIDGE_H_ -#define _SOC_APOLLOLAKE_NORTHBRIDGE_H_ - -#define MCHBAR 0x48 -#define PCIEXBAR 0x60 -#define PCIEX_SIZE (256 * MiB) - -#define BDSM 0xb0 /* Base Data Stolen Memory */ -#define BGSM 0xb4 /* Base GTT Stolen Memory */ -#define TSEG 0xb8 /* TSEG base */ -#define TOLUD 0xbc /* Top of Low Used Memory */ -#define TOUUD 0xa8 /* Top of Upper Usable DRAM */ - -/* IMR registers are found under MCHBAR. */ -#define MCHBAR_IMR0BASE 0x6870 -#define MCHBAR_IMR0MASK 0x6874 -#define MCH_IMR_PITCH 0x20 -#define MCH_NUM_IMRS 20 - -/* RAPL Package Power Limit register under MCHBAR. */ -#define MCHBAR_RAPL_PPL 0x70A8 - -#endif /* _SOC_APOLLOLAKE_NORTHBRIDGE_H_ */ diff --git a/src/soc/intel/apollolake/include/soc/systemagent.h b/src/soc/intel/apollolake/include/soc/systemagent.h new file mode 100644 index 0000000000..9944c15197 --- /dev/null +++ b/src/soc/intel/apollolake/include/soc/systemagent.h @@ -0,0 +1,32 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Andrey Petrov for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_APOLLOLAKE_SYSTEMAGENT_H +#define SOC_APOLLOLAKE_SYSTEMAGENT_H + +#include + +/* IMR registers are found under MCHBAR. */ +#define MCHBAR_IMR0BASE 0x6870 +#define MCHBAR_IMR0MASK 0x6874 +#define MCH_IMR_PITCH 0x20 +#define MCH_NUM_IMRS 20 + +/* RAPL Package Power Limit register under MCHBAR. */ +#define MCHBAR_RAPL_PPL 0x70A8 + +#endif /* SOC_APOLLOLAKE_SYSTEMAGENT_H */ -- cgit v1.2.3