From a7d2f2982364f7b9c0c0410f7ba07e6d6c7aa527 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 18 Aug 2019 06:55:52 +0300 Subject: intel/car: Use common TS_START_ROMSTAGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This timestamp also got unintentionally removed from some boards as they were transformed to use common romstage entry. Change-Id: I12be278a674f9a2ea073b170a223c41c7fc01a94 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34970 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/romstage.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/soc/intel/apollolake/romstage.c') diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 2c283396c9..7e369f46c8 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -47,7 +47,6 @@ #include #include #include -#include #include "chip.h" static const uint8_t hob_variable_guid[16] = { @@ -199,8 +198,6 @@ void mainboard_romstage_entry(void) struct chipset_power_state *ps = pmc_get_power_state(); const void *new_var_data; - timestamp_add_now(TS_START_ROMSTAGE); - soc_early_romstage_init(); s3wake = pmc_fill_power_state(ps) == ACPI_S3; -- cgit v1.2.3