From 452d31ad752cff53776b1780e2dac76c67575997 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Tue, 24 Sep 2013 16:47:49 -0500 Subject: baytrail: introduce pattrs The pattrs structure is intended for the supporting coreboot code to reference instead of going back to the source of the values (msrs, cpuid, etc). It essentially serves as a global structure for collecting attributes about the platform/processor. Additionally, the implementation provides a point during boot to hoook work before device enumeration/initialization by providing a init() function to soc_intel_baytrail_ops that is called before device work in the boot state machine. BUG=chrome-os-partner:22862 BUG=chrome-os-partner:22863 BRANCH=None TEST=Built and booted. Noted pattrs output. Change-Id: I073da8aca29635146fb0d4a2625b2b7564fd8414 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/170403 Reviewed-by: Shawn Nematbakhsh Reviewed-on: http://review.coreboot.org/4854 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/intel/baytrail/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/baytrail/Makefile.inc') diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index d8dcaf6f41..756fd39f8f 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -3,6 +3,7 @@ subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/tsc +subdirs-y += ../../../cpu/intel/microcode ramstage-y += memmap.c romstage-y += memmap.c @@ -16,6 +17,7 @@ ramstage-y += chip.c ramstage-y += iosf.c romstage-y += iosf.c ramstage-y += northcluster.c +ramstage-y += ramstage.c # Remove as ramstage gets fleshed out -- cgit v1.2.3