From 7837be6cbb9dfacf66d0981e281c3d9a0a35767d Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Mon, 21 Oct 2013 22:32:00 -0500 Subject: baytrail: SMM support Initialize SMM on all CPUs by relocating the SMM region and setting SMRR on all the cores. Additionally SMI is enabled in the south cluster. BUG=chrome-os-partner:22862 BRANCH=None TEST=Built and booted rambi. Tested with DEBUG_SMI and noted power button turns off board while in firmware. Change-Id: I92e3460572feeb67d4a3d4d26af5f0ecaf7d3dd5 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/173983 Reviewed-on: http://review.coreboot.org/4892 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/soc/intel/baytrail/Makefile.inc | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/baytrail/Makefile.inc') diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 686b4ac022..f802388724 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -3,6 +3,7 @@ subdirs-y += microcode subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr +subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode @@ -10,10 +11,12 @@ ramstage-y += memmap.c romstage-y += memmap.c ramstage-y += tsc_freq.c romstage-y += tsc_freq.c +smm-y += tsc_freq.c ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += nvm.c ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c ramstage-y += spi.c +smm-y += spi.c ramstage-y += chip.c ramstage-y += iosf.c romstage-y += iosf.c @@ -23,6 +26,10 @@ ramstage-y += gpio.c romstage-y += reset.c ramstage-y += reset.c ramstage-y += cpu.c +ramstage-y += pmutil.c +smm-y += pmutil.c +smm-y += smihandler.c +ramstage-y += smm.c # Remove as ramstage gets fleshed out ramstage-y += placeholders.c -- cgit v1.2.3