From b48d63359bb4beb63cf2e14edb7b1d833e602ce1 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 4 Jun 2019 14:51:19 +0200 Subject: soc/intel/baytrail: Use sb/intel/common/spi.c This common implementation is compatible. Change-Id: I2023bb7522ec40f1d9911cb5c57d7d66e4cefa6d Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/33206 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/baytrail/include/soc/spi.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/soc/intel/baytrail/include') diff --git a/src/soc/intel/baytrail/include/soc/spi.h b/src/soc/intel/baytrail/include/soc/spi.h index 063dd7fd3a..1ac0b59e56 100644 --- a/src/soc/intel/baytrail/include/soc/spi.h +++ b/src/soc/intel/baytrail/include/soc/spi.h @@ -20,14 +20,7 @@ /* These registers live behind SPI_BASE_ADDRESS. */ #define HSFSTS 0x04 -#define FDATA0 0x10 # define FLOCKDN (0x1 << 15) -#define SSFS 0x90 -# define CYCLE_DONE_STATUS (0x1 << 2) -# define FLASH_CYCLE_ERROR (0x1 << 3) -#define SSFC 0x91 -# define SPI_CYCLE_GO (0x1 << 1) -# define DATA_CYCLE (0x1 << 14) #define PREOP 0x94 #define OPTYPE 0x96 #define OPMENU0 0x98 -- cgit v1.2.3