From 9f83e873f4f0a06a68f68414720e837a69f54184 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Mon, 11 Nov 2013 14:45:27 -0600 Subject: baytrail: add GPIO SMI support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GPIOs which trigger SMIs only set the status bits in the ALT_GPIO_SMI regier. No bits in the SMI_STS register are set. Therefore, the ALT_GPIO_SMI register needs to be read and cleared on every SMI. Additionally, the mainboard_gpi_smi() handler needs to be called as well on every SMI because of this property. BUG=chrome-os-partner:23505 BRANCH=None TEST=Built and booted to recovery screen. Typed 'lidclose' on EC console. SMI occurred which caused the board to be shutdown. Change-Id: Ic204d8b928a0cb4f51f108a649f374d9f94e4f47 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/176391 Reviewed-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/4958 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/soc/intel/baytrail/smm.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/baytrail/smm.c') diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c index 1ba6246596..c654c8597e 100644 --- a/src/soc/intel/baytrail/smm.c +++ b/src/soc/intel/baytrail/smm.c @@ -61,6 +61,7 @@ void southcluster_smm_clear_state(void) clear_pm1_status(); clear_tco_status(); clear_gpe_status(); + clear_alt_status(); } static void southcluster_smm_route_gpios(void) -- cgit v1.2.3