From eb789f0b79aa99e214ccefc04f9f78b550f52f32 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 27 Oct 2018 16:40:25 +0200 Subject: src: Use include when appropriate Change-Id: I3b852cae4ef84d257bf1e5486447583bdd16b441 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/29301 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/braswell/romstage/romstage.c | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/intel/braswell') diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index ca1eb40236..ae2eac8e20 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.3