From 696ebc2dbc64c3a76b45080cebf9949db00348e2 Mon Sep 17 00:00:00 2001 From: Youness Alaoui Date: Tue, 7 Feb 2017 13:54:45 -0500 Subject: Broadwell/Sata: Add support for setting IOBP registers for Ports 2 and 3. The Broadwell SATA controller supports IOBP registers on ports 0 and 1 but Browell supports up to 4 ports, so we need to support setting IOBP for ports 2 and 3 as well. The magic numbers (IOBP SECRT88 and DTLE) for ports 2 and 3 were only guessed by looking at ports 0 and 1 and extrapolating from there. Port 3 has been tested (DTLE setting on Librem 13) and confirmed to work so we can assume that port 2 and 3 magic numbers are valid, but having someone confirm them (through non-public documents?) would be great. Change-Id: I59911cfa677749ceea9a544a99b444722392e72d Signed-off-by: Youness Alaoui Reviewed-on: https://review.coreboot.org/18408 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/soc/intel/broadwell/chip.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/broadwell/chip.h') diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h index 338ec14ebd..46c2c1d8ba 100644 --- a/src/soc/intel/broadwell/chip.h +++ b/src/soc/intel/broadwell/chip.h @@ -44,8 +44,12 @@ struct soc_intel_broadwell_config { uint8_t sata_port_map; uint32_t sata_port0_gen3_tx; uint32_t sata_port1_gen3_tx; + uint32_t sata_port2_gen3_tx; + uint32_t sata_port3_gen3_tx; uint32_t sata_port0_gen3_dtle; uint32_t sata_port1_gen3_dtle; + uint32_t sata_port2_gen3_dtle; + uint32_t sata_port3_gen3_dtle; /* * SATA DEVSLP Mux -- cgit v1.2.3