From f212cf3506a9ad3d699a4afe148bfd554932f7b8 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Tue, 18 Dec 2018 10:24:55 +0100 Subject: soc/intel: Standardize names of common MSRs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use defined name in Intel 64 and IA-32 Architectures Software Developer’s Manual. Renamed MSRs are (register address, register name): 0x35 MSR_CORE_THREAD_COUNT 0x121 MSR_EMULATE_PM_TIMER 0x1f4 MSR_PRMRR_PHYS_BASE 0x1f5 MSR_PRMRR_PHYS_MASK 0x2f4 MSR_UNCORE_PRMRR_PHYS_BASE 0x2f5 MSR_UNCORE_PRMRR_PHYS_MASK Change-Id: I53f11a2ce831456d598aa21303a817d18ac89bba Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/30288 Tested-by: build bot (Jenkins) Reviewed-by: Lijian Zhao --- src/soc/intel/broadwell/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/broadwell/cpu.c') diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index eab6b00734..10ae489e5f 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -622,7 +622,7 @@ static int get_cpu_count(void) int num_threads; int num_cores; - msr = rdmsr(CORE_THREAD_COUNT_MSR); + msr = rdmsr(MSR_CORE_THREAD_COUNT); num_threads = (msr.lo >> 0) & 0xffff; num_cores = (msr.lo >> 16) & 0xffff; printk(BIOS_DEBUG, "CPU has %u cores, %u threads enabled.\n", -- cgit v1.2.3