From 79ccc6933284ca02d17d9e1eda9a531ce43e1f65 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 24 Feb 2020 13:43:39 +0100 Subject: src: capitalize 'PCIe' Change-Id: I55bbb535372dc9af556b95ba162f02ffead2b9e2 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/39101 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/broadwell/include/soc/nvs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/broadwell/include') diff --git a/src/soc/intel/broadwell/include/soc/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h index 456fda6fa6..ea64341e58 100644 --- a/src/soc/intel/broadwell/include/soc/nvs.h +++ b/src/soc/intel/broadwell/include/soc/nvs.h @@ -75,7 +75,7 @@ typedef struct global_nvs_t { u8 pavp; /* 0xe9 - IGD PAVP data */ u8 rsvd2; /* 0xea - rsvd */ u8 oscc; /* 0xeb - PCIe OSC control */ - u8 npce; /* 0xec - native pcie support */ + u8 npce; /* 0xec - native PCIe support */ u8 plfl; /* 0xed - platform flavor */ u8 brev; /* 0xee - board revision */ u8 dpbm; /* 0xef - digital port b mode */ -- cgit v1.2.3