From 26b7cd0fa86562402b72509319a2b98ce8c21a8e Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Thu, 16 Mar 2017 18:47:55 -0700 Subject: soc/intel/broadwell: Fix spacing issues detected by checkpatch Fix the following errors and warnings detected by checkpatch.pl: ERROR: code indent should use tabs where possible ERROR: space required after that ',' (ctx:VxV) ERROR: space prohibited before that ',' (ctx:WxW) ERROR: spaces required around that '=' (ctx:VxV) ERROR: spaces required around that '<=' (ctx:WxV) ERROR: spaces required around that '<=' (ctx:VxV) ERROR: spaces required around that '>' (ctx:VxV) ERROR: spaces required around that '>=' (ctx:VxV) ERROR: spaces required around that '+=' (ctx:VxV) ERROR: spaces required around that '<' (ctx:VxV) ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" ERROR: space required before the open parenthesis '(' WARNING: space prohibited between function name and open parenthesis '(' WARNING: please, no space before tabs WARNING: please, no spaces at the start of a line False positives are generated for the following test: WARNING: space prohibited between function name and open parenthesis '(' in both pei_data.h and pei_wrapper.h TEST=None Change-Id: Icab08e5fcb6d5089902ae5ec2aa5bbee5ac432ed Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/18872 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/soc/intel/broadwell/romstage/cpu.c | 2 +- src/soc/intel/broadwell/romstage/raminit.c | 4 ++-- src/soc/intel/broadwell/romstage/report_platform.c | 2 +- src/soc/intel/broadwell/romstage/romstage.c | 4 ++-- src/soc/intel/broadwell/romstage/spi.c | 6 +++--- 5 files changed, 9 insertions(+), 9 deletions(-) (limited to 'src/soc/intel/broadwell/romstage') diff --git a/src/soc/intel/broadwell/romstage/cpu.c b/src/soc/intel/broadwell/romstage/cpu.c index c014426859..f251652de4 100644 --- a/src/soc/intel/broadwell/romstage/cpu.c +++ b/src/soc/intel/broadwell/romstage/cpu.c @@ -30,7 +30,7 @@ void set_max_freq(void) { msr_t msr, perf_ctl, platform_info; - /* Check for configurable TDP option */ + /* Check for configurable TDP option */ platform_info = rdmsr(MSR_PLATFORM_INFO); if ((platform_info.hi >> 1) & 3) { diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index 1185788ea7..10cb733e52 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -43,7 +43,7 @@ void raminit(struct pei_data *pei_data) { struct region_device rdev; - struct memory_info* mem_info; + struct memory_info *mem_info; pei_wrapper_entry_t entry; int ret; @@ -99,7 +99,7 @@ void raminit(struct pei_data *pei_data) /* Print the MRC version after executing the UEFI PEI stage. */ u32 version = MCHBAR32(MCHBAR_PEI_VERSION); printk(BIOS_DEBUG, "MRC Version %d.%d.%d Build %d\n", - version >> 24 , (version >> 16) & 0xff, + version >> 24, (version >> 16) & 0xff, (version >> 8) & 0xff, version & 0xff); report_memory_config(); diff --git a/src/soc/intel/broadwell/romstage/report_platform.c b/src/soc/intel/broadwell/romstage/report_platform.c index e50046c4c8..fc8b37c733 100644 --- a/src/soc/intel/broadwell/romstage/report_platform.c +++ b/src/soc/intel/broadwell/romstage/report_platform.c @@ -98,7 +98,7 @@ static void report_cpu_info(void) if (cpuidr.eax < 0x80000004) { strcpy(cpu_string, "Platform info not available"); } else { - u32 *p = (u32*) cpu_string; + u32 *p = (u32 *)cpu_string; for (i = 2; i <= 4 ; i++) { cpuidr = cpuid(index + i); *p++ = cpuidr.eax; diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 849c55d3e8..7c74aa4b8a 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -38,8 +38,8 @@ #include /* Entry from cache-as-ram.inc. */ -void * asmlinkage romstage_main(unsigned long bist, - uint32_t tsc_low, uint32_t tsc_hi) +asmlinkage void *romstage_main(unsigned long bist, + uint32_t tsc_low, uint32_t tsc_hi) { struct romstage_params rp = { .bist = bist, diff --git a/src/soc/intel/broadwell/romstage/spi.c b/src/soc/intel/broadwell/romstage/spi.c index c8ffd140d8..c4a5452c20 100644 --- a/src/soc/intel/broadwell/romstage/spi.c +++ b/src/soc/intel/broadwell/romstage/spi.c @@ -27,7 +27,7 @@ static int early_spi_read_block(u32 offset, u8 size, u8 *buffer) { - u32 *ptr32 = (u32*)buffer; + u32 *ptr32 = (u32 *)buffer; u32 i; /* Clear status bits */ @@ -76,13 +76,13 @@ static int early_spi_read_block(u32 offset, u8 size, u8 *buffer) } /* Read the data */ - for (i = 0; i < size; i+=sizeof(u32)) { + for (i = 0; i < size; i += sizeof(u32)) { if (size-i >= 4) { /* reading >= dword */ *ptr32++ = SPIBAR32(SPIBAR_FDATA(i/sizeof(u32))); } else { /* reading < dword */ - u8 j, *ptr8 = (u8*)ptr32; + u8 j, *ptr8 = (u8 *)ptr32; u32 temp = SPIBAR32(SPIBAR_FDATA(i/sizeof(u32))); for (j = 0; j < (size-i); j++) { *ptr8++ = temp & 0xff; -- cgit v1.2.3