From 4ee4bd5bb000b5c78e3d4a3f0113fe1e46e44851 Mon Sep 17 00:00:00 2001
From: Julius Werner <jwerner@chromium.org>
Date: Mon, 20 Oct 2014 13:46:39 -0700
Subject: broadwell: Change all SoC headers to <soc/headername.h> system

This patch aligns broadwell to the new SoC header include scheme.

BUG=None
TEST=Tested with whole series. Compiled Auron and Samus.

Change-Id: I0cb6aa3d17ce28890e586be1c2c7ad16d91dd925
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 23bcaa8110c4b63999c6ebf370045e9bef87ce6e
Original-Change-Id: I613ec0e2b970c75d1f8f7d9bb454bcf11abc78f0
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/224507
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9364
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@google.com>
---
 src/soc/intel/broadwell/sata.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

(limited to 'src/soc/intel/broadwell/sata.c')

diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c
index 6859ffce37..cfb3854831 100644
--- a/src/soc/intel/broadwell/sata.c
+++ b/src/soc/intel/broadwell/sata.c
@@ -24,11 +24,11 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <delay.h>
-#include <broadwell/iobp.h>
-#include <broadwell/ramstage.h>
-#include <broadwell/rcba.h>
-#include <broadwell/sata.h>
-#include <chip.h>
+#include <soc/iobp.h>
+#include <soc/ramstage.h>
+#include <soc/rcba.h>
+#include <soc/sata.h>
+#include <soc/intel/broadwell/chip.h>
 
 static inline u32 sir_read(struct device *dev, int idx)
 {
-- 
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