From 6b43055b7a51bd3e27578bbb544aa638228f6eaf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 22 Jan 2021 07:52:43 +0200 Subject: ELOG: Add const qualifier for chipset_power_state MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It is never allowed for ELOG to modify the state. Change-Id: Ie24df3969a3744f27b23997471666e2490e24b84 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49820 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks Reviewed-by: Angel Pons --- src/soc/intel/broadwell/pch/elog.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/broadwell') diff --git a/src/soc/intel/broadwell/pch/elog.c b/src/soc/intel/broadwell/pch/elog.c index 9271e27872..1d4d773fcd 100644 --- a/src/soc/intel/broadwell/pch/elog.c +++ b/src/soc/intel/broadwell/pch/elog.c @@ -20,7 +20,7 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start) } } -static void pch_log_wake_source(struct chipset_power_state *ps) +static void pch_log_wake_source(const struct chipset_power_state *ps) { /* Power Button */ if (ps->pm1_sts & PWRBTN_STS) @@ -56,7 +56,7 @@ static void pch_log_wake_source(struct chipset_power_state *ps) pch_log_gpio_gpe(ps->gpe0_sts[GPE_94_64], ps->gpe0_en[GPE_94_64], 64); } -static void pch_log_power_and_resets(struct chipset_power_state *ps) +static void pch_log_power_and_resets(const struct chipset_power_state *ps) { /* Thermal Trip Status */ if (ps->gen_pmcon2 & THERMTRIP_STS) -- cgit v1.2.3