From e866a2fde43b0c75aa8ce29291c8b44dffe8e65c Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Fri, 23 Oct 2020 15:54:33 +0200
Subject: soc/intel/broadwell: Merge `chip.c` into `systemagent.c`

Prepare to break down Broadwell into CPU, northbridge and southbridge.

Change-Id: Ic844cc3bbff760fa0eed9d81208bbeef39577e9d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46698
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/broadwell/Makefile.inc  |  1 -
 src/soc/intel/broadwell/chip.c        | 45 -----------------------------------
 src/soc/intel/broadwell/systemagent.c | 38 +++++++++++++++++++++++++++++
 3 files changed, 38 insertions(+), 46 deletions(-)
 delete mode 100644 src/soc/intel/broadwell/chip.c

(limited to 'src/soc/intel/broadwell')

diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index 786fe2ae5e..e24b949fb5 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -18,7 +18,6 @@ bootblock-y += ../../../cpu/x86/early_reset.S
 
 ramstage-y += acpi.c
 ramstage-y += adsp.c
-ramstage-y += chip.c
 ramstage-y += cpu.c
 ramstage-y += cpu_info.c
 smm-y += cpu_info.c
diff --git a/src/soc/intel/broadwell/chip.c b/src/soc/intel/broadwell/chip.c
deleted file mode 100644
index 9358c78b62..0000000000
--- a/src/soc/intel/broadwell/chip.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/device.h>
-#include <device/pci.h>
-#include <soc/acpi.h>
-#include <soc/pci_devs.h>
-#include <soc/ramstage.h>
-#include <soc/intel/broadwell/chip.h>
-
-static struct device_operations pci_domain_ops = {
-	.read_resources    = &pci_domain_read_resources,
-	.set_resources     = &pci_domain_set_resources,
-	.scan_bus          = &pci_domain_scan_bus,
-#if CONFIG(HAVE_ACPI_TABLES)
-	.write_acpi_tables = &northbridge_write_acpi_tables,
-#endif
-};
-
-static struct device_operations cpu_bus_ops = {
-	.read_resources   = noop_read_resources,
-	.set_resources    = noop_set_resources,
-	.init             = &broadwell_init_cpus,
-};
-
-static void broadwell_enable(struct device *dev)
-{
-	/* Set the operations if it is a special bus type */
-	if (dev->path.type == DEVICE_PATH_DOMAIN) {
-		dev->ops = &pci_domain_ops;
-	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
-		dev->ops = &cpu_bus_ops;
-	} else if (dev->path.type == DEVICE_PATH_PCI) {
-		/* Handle PCH device enable */
-		if (PCI_SLOT(dev->path.pci.devfn) > SA_DEV_SLOT_MINIHD &&
-		    (dev->ops == NULL || dev->ops->enable == NULL)) {
-			broadwell_pch_enable_dev(dev);
-		}
-	}
-}
-
-struct chip_operations soc_intel_broadwell_ops = {
-	CHIP_NAME("Intel Broadwell")
-	.enable_dev = &broadwell_enable,
-	.init       = &broadwell_init_pre_device,
-};
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index 0837e0ce27..4b4848b4ef 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -10,6 +10,7 @@
 #include <device/pci_ids.h>
 #include <intelblocks/power_limit.h>
 #include <vendorcode/google/chromeos/chromeos.h>
+#include <soc/acpi.h>
 #include <soc/cpu.h>
 #include <soc/iomap.h>
 #include <soc/pci_devs.h>
@@ -451,3 +452,40 @@ static const struct pci_driver systemagent_driver __pci_driver = {
 	.vendor  = PCI_VENDOR_ID_INTEL,
 	.devices = systemagent_ids
 };
+
+static struct device_operations pci_domain_ops = {
+	.read_resources    = &pci_domain_read_resources,
+	.set_resources     = &pci_domain_set_resources,
+	.scan_bus          = &pci_domain_scan_bus,
+#if CONFIG(HAVE_ACPI_TABLES)
+	.write_acpi_tables = &northbridge_write_acpi_tables,
+#endif
+};
+
+static struct device_operations cpu_bus_ops = {
+	.read_resources   = noop_read_resources,
+	.set_resources    = noop_set_resources,
+	.init             = &broadwell_init_cpus,
+};
+
+static void broadwell_enable(struct device *dev)
+{
+	/* Set the operations if it is a special bus type */
+	if (dev->path.type == DEVICE_PATH_DOMAIN) {
+		dev->ops = &pci_domain_ops;
+	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
+		dev->ops = &cpu_bus_ops;
+	} else if (dev->path.type == DEVICE_PATH_PCI) {
+		/* Handle PCH device enable */
+		if (PCI_SLOT(dev->path.pci.devfn) > SA_DEV_SLOT_MINIHD &&
+		    (dev->ops == NULL || dev->ops->enable == NULL)) {
+			broadwell_pch_enable_dev(dev);
+		}
+	}
+}
+
+struct chip_operations soc_intel_broadwell_ops = {
+	CHIP_NAME("Intel Broadwell")
+	.enable_dev = &broadwell_enable,
+	.init       = &broadwell_init_pre_device,
+};
-- 
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