From b0c4cbb7aff5656a35babe7020c71b45fe3235a6 Mon Sep 17 00:00:00 2001 From: Abhay Kumar Date: Thu, 12 Oct 2017 11:33:01 -0700 Subject: soc/intel/cannonlake: Add IGD Support and pre-OS display code 1. Add IGD opregion initialization. 2. Use frame buffer return by FSP for display. 3. Derived from "src/soc/intel/apollolake/graphics.c" with changes needed for CNL. TEST=Pre-OS screen comes up and VBT is getting passed to kernel. Change-Id: I19c0cf6cfc03fc9df9e98c75af4e486cb5a19e32 Signed-off-by: Abhay Kumar Reviewed-on: https://review.coreboot.org/21999 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Arthur Heymans --- src/soc/intel/cannonlake/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/cannonlake/Makefile.inc') diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 1076e10efe..8dfff91544 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -32,6 +32,7 @@ ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += finalize.c ramstage-y += gpio.c +ramstage-y += graphics.c ramstage-y += gspi.c ramstage-y += gpio.c ramstage-y += lpc.c -- cgit v1.2.3