From b3dfcb863cdc62cd2cb65e97e0043311b151c558 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Wed, 16 Aug 2017 22:18:52 -0700 Subject: soc/intel/cannonlake: Enable common PMC code for CNL This update changes Cannonlake to use the new common PMC code. This will help to reduce code duplication and streamline code bring up. Change-Id: Ia69fee8985e1c39b0e4b104c51439bca1a5493ac Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/21062 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/cannonlake/Makefile.inc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/cannonlake/Makefile.inc') diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 8a83eb0578..10d444be4b 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -9,6 +9,7 @@ bootblock-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c bootblock-y += bootblock/bootblock.c bootblock-y += bootblock/cpu.c bootblock-y += bootblock/pch.c +bootblock-y += pmutil.c bootblock-y += bootblock/report_platform.c bootblock-y += gpio.c bootblock-y += gspi.c @@ -18,6 +19,7 @@ bootblock-$(CONFIG_UART_DEBUG) += uart.c romstage-y += gspi.c romstage-y += memmap.c +romstage-y += pmutil.c romstage-y += reset.c romstage-y += spi.c romstage-$(CONFIG_UART_DEBUG) += uart.c @@ -25,12 +27,14 @@ romstage-$(CONFIG_UART_DEBUG) += uart.c ramstage-y += chip.c ramstage-y += gspi.c ramstage-y += memmap.c +ramstage-y += pmutil.c ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c ramstage-y += spi.c ramstage-y += systemagent.c ramstage-$(CONFIG_UART_DEBUG) += uart.c postcar-y += memmap.c +postcar-y += pmutil.c postcar-y += spi.c postcar-$(CONFIG_UART_DEBUG) += uart.c -- cgit v1.2.3