From 4d9d3f164de7002dd38f12dc40f9b260f63d2d9b Mon Sep 17 00:00:00 2001
From: Aamir Bohra <aamir.bohra@intel.com>
Date: Mon, 9 Dec 2019 16:05:52 +0530
Subject: soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power
 idle

With Audio DSP OSC qualification disabled from S0ix criteria.
S0ix is achieved before the DSP is suspended. When driver tries
to suspend DSP its already turned off.

BUG=b:139481313

Change-Id: I20b793b95483af03ce4ae068ac07864a9e90d39b
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37604
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/cannonlake/include/soc/pmc.h | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/soc/intel/cannonlake/include')

diff --git a/src/soc/intel/cannonlake/include/soc/pmc.h b/src/soc/intel/cannonlake/include/soc/pmc.h
index 252c719925..fbd366bb2c 100644
--- a/src/soc/intel/cannonlake/include/soc/pmc.h
+++ b/src/soc/intel/cannonlake/include/soc/pmc.h
@@ -156,6 +156,9 @@
 #define CPPMVRIC			0x1B1C
 #define   XTALSDQDIS			(1 << 22)
 
+#define CPPMVRIC2			0x1B4C
+#define   ADSPOSCDIS			(1 << 22)
+
 #define IRQ_REG				ACTL
 #define SCI_IRQ_ADJUST			0
 #define ACTL				0x1BD8
-- 
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