From db3f0e3ebd8364d3cd46130743f38ff8425299f8 Mon Sep 17 00:00:00 2001 From: John Zhao Date: Fri, 15 Mar 2019 16:54:27 -0700 Subject: soc/intel/cnl: Generate DMAR ACPI table The platform supports Virtualization Technology for Directed I/O. Generate DMAR acpi table if VT-d feature is enabled. BUG=b:130351429 TEST=Booted to kernel and verified the DMAR table contents. Change-Id: I4e1ee5244c67affb13947436d81628c5dc665c9e Signed-off-by: John Zhao Signed-off-by: Pratik Prajapati Reviewed-on: https://review.coreboot.org/c/coreboot/+/31917 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Furquan Shaikh Reviewed-by: Lijian Zhao --- src/soc/intel/cannonlake/systemagent.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/soc/intel/cannonlake/systemagent.c') diff --git a/src/soc/intel/cannonlake/systemagent.c b/src/soc/intel/cannonlake/systemagent.c index 9c8d761648..d850b15b34 100644 --- a/src/soc/intel/cannonlake/systemagent.c +++ b/src/soc/intel/cannonlake/systemagent.c @@ -18,10 +18,12 @@ #include #include #include +#include #include #include #include #include +#include "chip.h" /* * SoC implementation @@ -31,6 +33,8 @@ */ void soc_add_fixed_mmio_resources(struct device *dev, int *index) { + const struct soc_intel_cannonlake_config *const config = dev->chip_info; + static const struct sa_mmio_descriptor soc_fixed_resources[] = { { PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_SA_PCIEX_LENGTH, "PCIEXBAR" }, @@ -54,6 +58,15 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index) sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources, ARRAY_SIZE(soc_fixed_resources)); + + /* Add Vt-d resources if VT-d is enabled. */ + if ((pci_read_config32(dev, CAPID0_A) & VTD_DISABLE)) + return; + + if (!(config && config->VtdDisable)) { + sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources, + ARRAY_SIZE(soc_vtd_resources)); + } } /* -- cgit v1.2.3