From 2a244c682e76eaa048fb15a5e1858d7968fca2cf Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 14 Nov 2018 15:45:39 +0530 Subject: soc/intel/cannonlake: Make static IRQ mapping for PIC mode This patch makes static PIRQ->IRQ mapping, where IRQ10 is mapped to PBRC and IRQ11 is mapped for PARC/PCRC/PDRC/PERC/PFRC/PGRC/PHRC. Change-Id: I8722e34841fe53a4d425202b915ac7838af0d859 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/29629 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/chip.h | 11 ----------- src/soc/intel/cannonlake/lpc.c | 26 +++++++++++++------------- 2 files changed, 13 insertions(+), 24 deletions(-) (limited to 'src/soc/intel/cannonlake') diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 015133e9ed..4f30382d2d 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -43,17 +43,6 @@ struct soc_intel_cannonlake_config { /* Common struct containing soc config data required by common code */ struct soc_intel_common_config common_soc_config; - /* Interrupt Routing configuration. - * If bit7 is 1, the interrupt is disabled. */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; - /* GPE configuration */ uint32_t gpe0_en_1; /* GPE0_EN_31_0 */ uint32_t gpe0_en_2; /* GPE0_EN_63_32 */ diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index 84a2138efd..c058065043 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -145,17 +146,16 @@ static void pch_enable_ioapic(const struct device *dev) void soc_pch_pirq_init(const struct device *dev) { - const config_t *config = dev->chip_info; uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]; - pch_interrupt_routing[0] = config->pirqa_routing; - pch_interrupt_routing[1] = config->pirqb_routing; - pch_interrupt_routing[2] = config->pirqc_routing; - pch_interrupt_routing[3] = config->pirqd_routing; - pch_interrupt_routing[4] = config->pirqe_routing; - pch_interrupt_routing[5] = config->pirqf_routing; - pch_interrupt_routing[6] = config->pirqg_routing; - pch_interrupt_routing[7] = config->pirqh_routing; + pch_interrupt_routing[0] = PCH_IRQ11; + pch_interrupt_routing[1] = PCH_IRQ10; + pch_interrupt_routing[2] = PCH_IRQ11; + pch_interrupt_routing[3] = PCH_IRQ11; + pch_interrupt_routing[4] = PCH_IRQ11; + pch_interrupt_routing[5] = PCH_IRQ11; + pch_interrupt_routing[6] = PCH_IRQ11; + pch_interrupt_routing[7] = PCH_IRQ11; itss_irq_init(pch_interrupt_routing); #if defined(__SIMPLE_DEVICE__) @@ -173,16 +173,16 @@ void soc_pch_pirq_init(const struct device *dev) switch (int_pin) { case 1: /* INTA# */ - int_line = config->pirqa_routing; + int_line = PCH_IRQ11; break; case 2: /* INTB# */ - int_line = config->pirqb_routing; + int_line = PCH_IRQ10; break; case 3: /* INTC# */ - int_line = config->pirqc_routing; + int_line = PCH_IRQ11; break; case 4: /* INTD# */ - int_line = config->pirqd_routing; + int_line = PCH_IRQ11; break; } -- cgit v1.2.3