From 340908aecf01093d35aaf0b71c55ed65c3ebbeac Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Tue, 4 Apr 2017 11:47:19 -0700 Subject: soc/intel/lpss: Provide common LPSS clock config Since there are multiple controllers in the LPSS and all use the same frequency, provide a single Kconfig option for LPSS_CLOCK_MHZ. BUG=b:35583330 Change-Id: I3c0cb62d56916e6e5f671fb5f40210f4cb33316f Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/19115 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/intel/common/Kconfig | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) (limited to 'src/soc/intel/common/Kconfig') diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index 3d2ced95d6..919cb50406 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -67,6 +67,13 @@ config ACPI_CONSOLE help Provide a mechanism for serial console based ACPI debug. +config SOC_INTEL_COMMON_LPSS_CLOCK_MHZ + int + help + The clock speed that the controllers in LPSS(GSPI, I2C) are running + at, in MHz. No default is set here as this is an SOC-specific value + and must be provided by the SOC. + config SOC_INTEL_COMMON_LPSS_I2C bool default n @@ -74,14 +81,6 @@ config SOC_INTEL_COMMON_LPSS_I2C This driver supports the Intel Low Power Subsystem (LPSS) I2C controllers that are based on Synopsys DesignWare IP. -config SOC_INTEL_COMMON_LPSS_I2C_CLOCK_MHZ - int - depends on SOC_INTEL_COMMON_LPSS_I2C - help - The clock speed that the I2C controller is running at, in MHz. - No default is set here as this is an SOC-specific value and must - be provided by the SOC when it selects this driver. - config SOC_INTEL_COMMON_LPSS_I2C_DEBUG bool "Enable debug output for LPSS I2C transactions" default n -- cgit v1.2.3