From 63ebc80e987c6778d5f15583e59a1476d4943c66 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 8 Sep 2015 16:09:28 -0700 Subject: intel/common: Add common code for filling out ACPI _SWS Add common code for filling out the NVS fields that are used by the ACPI _SWS methods. The SOC must provide a function to fill out the wake source data since the specific data inputs vary by platform. BUG=chrome-os-partner:40635 BRANCH=none TEST=emerge-glados coreboot Change-Id: I4f3511adcc89a9be5d97a7442055c227a38c5f42 Signed-off-by: Patrick Georgi Original-Commit-Id: cee5fa176c16ca44712bce8f3c8045daa5f07339 Original-Change-Id: I16f446ef67777acb57223a84d38062be9f43fcb9 Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/298167 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11646 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/common/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/common/Kconfig') diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index 8e632bb8e5..43c52b5478 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -69,4 +69,8 @@ config ROMSTAGE_RAM_STACK_SIZE default 0x5000 depends on SOC_INTEL_COMMON_STACK +config SOC_INTEL_COMMON_ACPI_WAKE_SOURCE + bool + default n + endif # SOC_INTEL_COMMON -- cgit v1.2.3