From 7d6bc60db9427f029f990002870e40541601a209 Mon Sep 17 00:00:00 2001
From: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Date: Fri, 8 May 2020 19:22:07 +0530
Subject: tigerlake: enable DPTF functionality for volteer

Enable DPTF functionality for volteer platform

BRANCH=None
BUG=b:149722146
TEST=Built and tested on volteer system

Change-Id: I385fb409ccd291d97369295ff99f21c9430880f9
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41427
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/common/acpi/dptf.asl | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 src/soc/intel/common/acpi/dptf.asl

(limited to 'src/soc/intel/common/acpi')

diff --git a/src/soc/intel/common/acpi/dptf.asl b/src/soc/intel/common/acpi/dptf.asl
new file mode 100644
index 0000000000..bd6d63ef40
--- /dev/null
+++ b/src/soc/intel/common/acpi/dptf.asl
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#define DPTF_CPU_DEVICE		TCPU
+#define DPTF_CPU_ADDR		0x00040000
+
+#ifndef DPTF_CPU_PASSIVE
+#define DPTF_CPU_PASSIVE	80
+#endif
+
+#ifndef DPTF_CPU_CRITICAL
+#define DPTF_CPU_CRITICAL	90
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC0
+#define DPTF_CPU_ACTIVE_AC0	90
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC1
+#define DPTF_CPU_ACTIVE_AC1	80
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC2
+#define DPTF_CPU_ACTIVE_AC2	70
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC3
+#define DPTF_CPU_ACTIVE_AC3	60
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC4
+#define DPTF_CPU_ACTIVE_AC4	50
+#endif
-- 
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