From 01ae11b057e4b15e1fde48c7845f7fbf66a4e948 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sat, 4 Mar 2017 23:32:41 +0530 Subject: soc/intel/common/block: Add Intel common systemagent support Create common Intel systemagent code. This code currently contains the SA initialization required in Bootblock phase, which has the following programming- * Set PCIEXBAR * Clear TSEG register More code will get added up in the subsequent phases. Change-Id: I6f0c515278f7fd04d407463a1eeb25ba13639f5c Signed-off-by: Barnali Sarkar Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/18565 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- .../common/block/include/intelblocks/systemagent.h | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 src/soc/intel/common/block/include/intelblocks/systemagent.h (limited to 'src/soc/intel/common/block/include') diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h new file mode 100644 index 0000000000..77248bbb1a --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_COMMON_BLOCK_SA_H +#define SOC_INTEL_COMMON_BLOCK_SA_H + +/* Device 0:0.0 PCI configuration space */ + +#define MCHBAR 0x48 +#define PCIEXBAR 0x60 +#define PCIEXBAR_LENGTH_64MB 2 +#define PCIEXBAR_LENGTH_128MB 1 +#define PCIEXBAR_LENGTH_256MB 0 +#define PCIEXBAR_PCIEXBAREN (1 << 0) +#define GGC 0x50 + +#define TOUUD 0xa8 /* Top of Upper Usable DRAM */ +#define BDSM 0xb0 /* Base Data Stolen Memory */ +#define BGSM 0xb4 /* Base GTT Stolen Memory */ +#define TSEG 0xb8 /* TSEG base */ +#define TOLUD 0xbc /* Top of Low Used Memory */ + +void bootblock_systemagent_early_init(void); + +#endif /* SOC_INTEL_COMMON_BLOCK_SA_H */ -- cgit v1.2.3