From 52f29743b153e89ca38db5d7a207c676c4c70207 Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Wed, 19 Apr 2017 18:19:14 +0530 Subject: soc/intel/common/block: Add Intel common SMBus code Add below code support under intel/common/block: * SMBus read/write byte APIs * Common SMBus initialization code Change-Id: I936143a334c31937d557c6828e5876d35b133567 Signed-off-by: Aamir Bohra Reviewed-on: https://review.coreboot.org/19372 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Arthur Heymans --- .../intel/common/block/include/intelblocks/smbus.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 src/soc/intel/common/block/include/intelblocks/smbus.h (limited to 'src/soc/intel/common/block/include') diff --git a/src/soc/intel/common/block/include/intelblocks/smbus.h b/src/soc/intel/common/block/include/intelblocks/smbus.h new file mode 100644 index 0000000000..262a9e8e65 --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/smbus.h @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_COMMON_BLOCK_SMBUS_H +#define SOC_INTEL_COMMON_BLOCK_SMBUS_H + +/* Program SMBus IO base, enable host Controller interface, clear status reg */ +void smbus_common_init(void); + +#endif /* SOC_INTEL_COMMON_BLOCK_SMBUS_H */ -- cgit v1.2.3