From 63032439f4278125b3a01d33d056761dd1ae8cba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sun, 11 Oct 2020 17:34:54 +0200 Subject: {cpu,soc}/intel: replace AES-NI locking by common implemenation call MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Deduplicate code by using the new common cpu code implementation of AES-NI locking. Change-Id: I7ab2d3839ecb758335ef8cc6a0c0c7103db0fa50 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/46278 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/common/block/include/intelblocks/msr.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/soc/intel/common/block/include') diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 2ef4561341..2e12bf071d 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -24,9 +24,6 @@ #define EMULATE_DELAY_OFFSET_VALUE 20 #define EMULATE_PM_TMR_EN (1 << 16) #define EMULATE_DELAY_VALUE 0x13 -#define MSR_FEATURE_CONFIG 0x13c -#define FEATURE_CONFIG_RESERVED_MASK 0x3ULL -#define FEATURE_CONFIG_LOCK (1 << 0) #define SMM_MCA_CAP_MSR 0x17d #define SMM_CPU_SVRSTR_BIT 57 #define SMM_CPU_SVRSTR_MASK (1 << (SMM_CPU_SVRSTR_BIT - 32)) -- cgit v1.2.3