From fc19ab5f3465d8f8a861f7492634d0afe847f56d Mon Sep 17 00:00:00 2001 From: Maulik Date: Fri, 5 Jan 2018 22:40:35 +0530 Subject: src/soc/intel: Add new device IDs to support coffeelake 1. Add new device IDs for SATA, GT and Northbridge to pci_ids.h 2. Add entry to identify CFL U GT and CPU to respective files 3. Add entry to identify CFL U to report_platform.c BUG=none BRANCH=none TEST=Boot to CFL U RVP board with this patch and check if coreboot is able to enumerate various devices and display correct component names properly in serial logs. Change-Id: I47c97fb9eb813587cd655e2bce05a686091619ed Signed-off-by: Maulik Reviewed-on: https://review.coreboot.org/27522 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Naresh Solanki Reviewed-by: Subrata Banik --- src/soc/intel/common/block/include/intelblocks/mp_init.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/common/block/include') diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h index 740c2559aa..4ad51d05d8 100644 --- a/src/soc/intel/common/block/include/intelblocks/mp_init.h +++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h @@ -38,6 +38,8 @@ #define CPUID_GLK_A0 0x706a0 #define CPUID_GLK_B0 0x706a1 #define CPUID_WHISKEYLAKE_W0 0x806eb +#define CPUID_COFFEELAKE_D0 0x806ea +#define CPUID_COFFEELAKE_U0 0x906ea /* * MP Init callback function to Find CPU Topology. This function is common -- cgit v1.2.3