From 66f1f382cd3bd5a7250e0a7ad35d9a1c505de47a Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Mon, 16 Oct 2017 19:40:18 +0800 Subject: intel/common/smbus: increase spd read performance This change increases the spd read performance by using smbus word access. BUG=b:67021853 TEST=boot to os and find 80~100 ms boot time improvement on one dimm Change-Id: I98fe67642d8ccd428bccbca7f6390331d6055d14 Signed-off-by: Kane Chen Reviewed-on: https://review.coreboot.org/22072 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/common/block/smbus/smbus_early.c | 5 ++++ src/soc/intel/common/block/smbus/smbuslib.c | 41 ++++++++++++++++++++++++++ src/soc/intel/common/block/smbus/smbuslib.h | 2 ++ 3 files changed, 48 insertions(+) (limited to 'src/soc/intel/common/block/smbus') diff --git a/src/soc/intel/common/block/smbus/smbus_early.c b/src/soc/intel/common/block/smbus/smbus_early.c index e0c4d9c649..9e6afc4563 100644 --- a/src/soc/intel/common/block/smbus/smbus_early.c +++ b/src/soc/intel/common/block/smbus/smbus_early.c @@ -36,6 +36,11 @@ static const struct reg_script smbus_init_script[] = { REG_SCRIPT_END, }; +u16 smbus_read_word(u32 smbus_dev, u8 addr, u8 offset) +{ + return smbus_read16(SMBUS_IO_BASE, addr, offset); +} + u8 smbus_read_byte(u32 smbus_dev, u8 addr, u8 offset) { return smbus_read8(SMBUS_IO_BASE, addr, offset); diff --git a/src/soc/intel/common/block/smbus/smbuslib.c b/src/soc/intel/common/block/smbus/smbuslib.c index 27b4ad5c5d..0d3901fa2b 100644 --- a/src/soc/intel/common/block/smbus/smbuslib.c +++ b/src/soc/intel/common/block/smbus/smbuslib.c @@ -135,3 +135,44 @@ int smbus_write8(unsigned int smbus_base, unsigned int device, return 0; } + +int smbus_read16(unsigned int smbus_base, unsigned int device, + unsigned int address) +{ + unsigned char global_status_register; + unsigned short data; + + if (smbus_wait_till_ready(smbus_base) < 0) + return SMBUS_WAIT_UNTIL_READY_TIMEOUT; + + /* Set up transaction */ + /* Disable interrupts */ + outb(inb(smbus_base + SMBHSTCTL) & ~1, smbus_base + SMBHSTCTL); + /* Set the device I'm talking to */ + outb(((device & 0x7f) << 1) | 1, smbus_base + SMBXMITADD); + /* Set the command/address... */ + outb(address & 0xff, smbus_base + SMBHSTCMD); + /* Set up for a word data read */ + outb((inb(smbus_base + SMBHSTCTL) & 0xe3) | (0x3 << 2), + (smbus_base + SMBHSTCTL)); + /* Clear any lingering errors, so the transaction will run */ + outb(inb(smbus_base + SMBHSTSTAT), smbus_base + SMBHSTSTAT); + + /* Start the command */ + outb((inb(smbus_base + SMBHSTCTL) | 0x40), + smbus_base + SMBHSTCTL); + + /* Poll for transaction completion */ + if (smbus_wait_till_done(smbus_base) < 0) + return SMBUS_WAIT_UNTIL_DONE_TIMEOUT; + + global_status_register = inb(smbus_base + SMBHSTSTAT); + /* Ignore the "In Use" status... */ + if ((global_status_register & ~(3 << 5)) != (1 << 1)) + return SMBUS_ERROR; + + /* Read results of transaction */ + data = inw(smbus_base + SMBHSTDAT0); + + return data; +} diff --git a/src/soc/intel/common/block/smbus/smbuslib.h b/src/soc/intel/common/block/smbus/smbuslib.h index b5be6ca84e..05dafe9947 100644 --- a/src/soc/intel/common/block/smbus/smbuslib.h +++ b/src/soc/intel/common/block/smbus/smbuslib.h @@ -34,5 +34,7 @@ int smbus_read8(unsigned int smbus_base, unsigned int device, unsigned int address); int smbus_write8(unsigned int smbus_base, unsigned int device, unsigned int address, unsigned int data); +int smbus_read16(unsigned int smbus_base, unsigned int device, + unsigned int address); #endif /* SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H */ -- cgit v1.2.3