From 39e1f44f331040b2e9574e9c792f583b8c6a5aba Mon Sep 17 00:00:00 2001 From: Gaggery Tsai Date: Wed, 8 Jan 2020 15:22:13 -0800 Subject: soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs This patch adds CML-S 2 and 4-Core MCH IDs and fix wrong ID for 10-Core ID. Change-Id: I30f6c8a5234b7754d984b598bf7bae103ec9712e Signed-off-by: Gaggery Tsai Reviewed-on: https://review.coreboot.org/c/coreboot/+/38287 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/common/block/systemagent/systemagent.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/common/block') diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 0fab7d9619..50e052414a 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -391,6 +391,8 @@ static const unsigned short systemagent_ids[] = { PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2, PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, + PCI_DEVICE_ID_INTEL_CML_S_G0G1_4, + PCI_DEVICE_ID_INTEL_CML_S_G0G1_2, PCI_DEVICE_ID_INTEL_CML_H, PCI_DEVICE_ID_INTEL_CML_H_4_2, PCI_DEVICE_ID_INTEL_CML_H_8_2, -- cgit v1.2.3