From 5131c6f79a74b6f24720bab8322e9cd946e74807 Mon Sep 17 00:00:00 2001 From: Jamie Ryu Date: Mon, 18 May 2020 10:13:31 -0700 Subject: soc/intel/tigerlake: Add CPU ID for TGL B0 Reference: - TGL User Guide #613584 Rev 2.2 - TGL User Guide #605534 Rev 1.0 BRANCH=none BUG=none TEST=build and boot tglrvp Change-Id: I5da80fd4ad321b1ded369c2b6c039b73fcb3773e Signed-off-by: Jamie Ryu Reviewed-on: https://review.coreboot.org/c/coreboot/+/41516 Reviewed-by: Wonkyu Kim Reviewed-by: Paul Menzel Reviewed-by: Nick Vaccaro Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/cpu/mp_init.c | 1 + src/soc/intel/common/block/include/intelblocks/mp_init.h | 1 + 2 files changed, 2 insertions(+) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 5cd0134ad8..90bae163bf 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -73,6 +73,7 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 }, { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 }, + { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0}, { 0, 0 }, diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h index c15c323389..e03d8bd53f 100644 --- a/src/soc/intel/common/block/include/intelblocks/mp_init.h +++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h @@ -41,6 +41,7 @@ #define CPUID_COMETLAKE_H_S_10_2_P0 0xa0651 #define CPUID_COMETLAKE_H_S_10_2_Q0_P1 0xa0654 #define CPUID_TIGERLAKE_A0 0x806c0 +#define CPUID_TIGERLAKE_B0 0x806c1 #define CPUID_ELKHARTLAKE_A0 0x90660 /* -- cgit v1.2.3