From 89e83b76b4d50d0977345becf504a1afa0668211 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Thu, 12 Nov 2020 23:47:30 +0100 Subject: soc/intel/common/block/acpi: add Kconfig for CPPC entries generation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ieae9f221ffb27cf52cab21a130e18aa3929caea3 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/47540 Reviewed-by: Tim Wawrzynczak Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/acpi/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/soc/intel/common') diff --git a/src/soc/intel/common/block/acpi/Kconfig b/src/soc/intel/common/block/acpi/Kconfig index ff59172f3b..d9a7a87859 100644 --- a/src/soc/intel/common/block/acpi/Kconfig +++ b/src/soc/intel/common/block/acpi/Kconfig @@ -4,3 +4,12 @@ config SOC_INTEL_COMMON_BLOCK_ACPI bool help Intel Processor common code for ACPI + +if SOC_INTEL_COMMON_BLOCK_ACPI + +config SOC_INTEL_COMMON_BLOCK_ACPI_CPPC + bool + help + Generate CPPC entries for Intel SpeedShift + +endif -- cgit v1.2.3