From f528195bdf141e84d3121411d2cbe32f5938dd72 Mon Sep 17 00:00:00 2001 From: Julien Viard de Galbert Date: Mon, 6 Nov 2017 13:19:58 +0100 Subject: soc/intel/denverton_ns: re-factor HSIO configuration The main goal is to allow configuring the HSIO lines from the mainboard code. Also share the code for both romstage and ramstage. Remove explicit dependency on the harcuvar mainboard. Change-Id: Iec65472207309eae878d14eef5bc644b80fdbb1d Signed-off-by: Julien Viard de Galbert Reviewed-on: https://review.coreboot.org/22309 Reviewed-by: FEI WANG Tested-by: build bot (Jenkins) --- src/soc/intel/denverton_ns/fiamux.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/denverton_ns/fiamux.c') diff --git a/src/soc/intel/denverton_ns/fiamux.c b/src/soc/intel/denverton_ns/fiamux.c index 282ba030e8..36b8223d04 100644 --- a/src/soc/intel/denverton_ns/fiamux.c +++ b/src/soc/intel/denverton_ns/fiamux.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 - 2017 Intel Corporation + * Copyright (C) 2017 Online SAS * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -138,3 +139,9 @@ BL_FIA_MUX_CONFIG_HOB *get_fiamux_hob_data(void) return fiamux_hob_data; } + +__attribute__((weak)) size_t mainboard_get_hsio_config(BL_HSIO_INFORMATION **p_hsio_config) +{ + *p_hsio_config = NULL; + return 0; +} -- cgit v1.2.3