From c70eed1e6202c928803f3e7f79161cd247a62b23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 22 May 2018 02:18:00 +0300 Subject: device: Use pcidev_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc Signed-off-by: Kyösti Mälkki Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/26484 Tested-by: build bot (Jenkins) Reviewed-by: Piotr Król Reviewed-by: Arthur Heymans --- src/soc/intel/fsp_baytrail/spi.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/soc/intel/fsp_baytrail/spi.c') diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index 4537bcc339..41d5150f4d 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -254,11 +254,9 @@ static ich9_spi_regs *spi_regs(void) uint32_t sbase; #ifdef __SMM__ - pci_devfn_t dev; - dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); + pci_devfn_t dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else - struct device *dev; - dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); + struct device *dev = pcidev_on_root(LPC_DEV, LPC_FUNC); #endif pci_read_config_dword(dev, SBASE, &sbase); sbase &= ~0x1ff; -- cgit v1.2.3