From f5cf60f25b8c77e0c90094e3326c5bc0e37cb383 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 18 Mar 2019 15:26:48 +0200 Subject: Move calls to quick_ram_check() before CBMEM init MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After raminit completes, do a read-modify-write test just below CBMEM top address. If test fails, die(). Change-Id: I33d4153a5ce0908b8889517394afb46f1ca28f92 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31978 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Werner Zeh --- src/soc/intel/fsp_baytrail/romstage/romstage.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'src/soc/intel/fsp_baytrail') diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index b4eb006aab..c46b09ef97 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -245,12 +244,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) late_mainboard_romstage_entry(); post_code(0x4c); - /* if S3 resume skip RAM check */ - if (prev_sleep_state != ACPI_S3) { - quick_ram_check(); - post_code(0x4d); - } - cbmem_was_initted = !cbmem_recovery(prev_sleep_state == ACPI_S3); /* Save the HOB pointer in CBMEM to be used in ramstage*/ -- cgit v1.2.3