From 0ea93cdc35d4e49b416c9c73093d722c0a7bd860 Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Tue, 6 Mar 2018 18:48:44 -0800 Subject: fsp_broadwell_de: Add ability to set PCIe completion timeout This enables the user to set the completion timeout value in PCI Express Device Control 2 register via devicetree.cb. Based on corebootBDE-270-iou-complto.patch in Arista EOS 4.20 release. Change-Id: If0527899bc2047d0e57c11f7801768d07f9a5179 Signed-off-by: David Hendricks Reviewed-on: https://review.coreboot.org/26225 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- src/soc/intel/fsp_broadwell_de/chip.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/soc/intel/fsp_broadwell_de/chip.h') diff --git a/src/soc/intel/fsp_broadwell_de/chip.h b/src/soc/intel/fsp_broadwell_de/chip.h index ed01c89de1..b7f59f7f12 100644 --- a/src/soc/intel/fsp_broadwell_de/chip.h +++ b/src/soc/intel/fsp_broadwell_de/chip.h @@ -23,7 +23,11 @@ * specified by the devicetree. */ struct soc_intel_fsp_broadwell_de_config { + /* PCIe completion timeout value */ + int pcie_compltoval; }; +typedef struct soc_intel_fsp_broadwell_de_config config_t; + extern struct chip_operations soc_intel_fsp_broadwell_de_ops; #endif /* _SOC_CHIP_H_ */ -- cgit v1.2.3