From c7267631e23ec113de898bf07b5f6f212acc3629 Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Sat, 30 Jun 2018 12:38:43 +0530 Subject: soc/intel/icelake: Add PID based on Icelake EDS Change-Id: I2d9e06f06a39dc76a3c1351d7976505d7bd92d10 Signed-off-by: Subrata Banik Signed-off-by: Aamir Bohra Reviewed-on: https://review.coreboot.org/29436 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/icelake/include/soc/pcr_ids.h | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'src/soc/intel/icelake/include') diff --git a/src/soc/intel/icelake/include/soc/pcr_ids.h b/src/soc/intel/icelake/include/soc/pcr_ids.h index b75bf67036..4cfb2946d0 100644 --- a/src/soc/intel/icelake/include/soc/pcr_ids.h +++ b/src/soc/intel/icelake/include/soc/pcr_ids.h @@ -20,11 +20,14 @@ */ #define PID_EMMC 0x52 #define PID_SDX 0x53 -#define PID_GPIOCOM4 0x6a -#define PID_GPIOCOM3 0x6b -#define PID_GPIOCOM2 0x6c -#define PID_GPIOCOM1 0x6d + #define PID_GPIOCOM0 0x6e +#define PID_GPIOCOM1 0x6d +#define PID_GPIOCOM2 0x6c +#define PID_GPIOCOM3 0x6b +#define PID_GPIOCOM4 0x6a +#define PID_GPIOCOM5 0x69 + #define PID_DMI 0x88 #define PID_PSTH 0x89 #define PID_CSME0 0x90 @@ -35,7 +38,7 @@ #define PID_PSF4 0xbd #define PID_SCS 0xc0 #define PID_RTC 0xc3 -#define PID_ITSS 0xc2 +#define PID_ITSS 0xc4 #define PID_LPC 0xc7 #define PID_SERIALIO 0xcb -- cgit v1.2.3