From db8f9229b1a17a5084c828ff8b078cec45f6ac99 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sat, 26 Oct 2019 10:44:33 +0200 Subject: soc/intel/icelake: adapt FSP GOP param to match the other FSP2.0 platforms MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set the FSP parameter PeiGraphicsPeimInit according to RUN_FSP_GOP to enable or skip GOP. Change-Id: I5993e64631f86ff0f9ae069e10b89df8bc4cd085 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36353 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/icelake/fsp_params.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'src/soc/intel/icelake') diff --git a/src/soc/intel/icelake/fsp_params.c b/src/soc/intel/icelake/fsp_params.c index 8819e7d033..62c69da2f2 100644 --- a/src/soc/intel/icelake/fsp_params.c +++ b/src/soc/intel/icelake/fsp_params.c @@ -94,15 +94,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) mainboard_silicon_init_params(params); dev = pcidev_path_on_root(SA_DEVFN_IGD); - - if (!dev || !dev->enabled) { - /* - * Skip IGD initialization in FSP in case device is disabled - * in the devicetree.cb. - */ - params->PeiGraphicsPeimInit = 0; - } else { + if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) params->PeiGraphicsPeimInit = 1; + else + params->PeiGraphicsPeimInit = 0; + if (dev && dev->enabled) { params->GtFreqMax = 2; params->CdClock = 3; } -- cgit v1.2.3