From 56fcfb5b4f00830d0c1bf2230e1104045d795c82 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Tue, 10 Nov 2020 13:39:37 -0700 Subject: soc/intel/common: Adapt XHCI elog driver for reuse Currently this XHCI driver assumes the PCH XHCI controller, but the TCSS or North XHCI block has a similar enough PCI MMIO structure to make this code mostly reusable. 1) Rename everything to drop the `pch_` prefix 2) xhci_update_wake_event() now takes in a pci_devfn_t for the XHCI controller 3) soc_get_xhci_usb_info() also now takes a pci_devfn_t for the XHCI controller BUG=b:172279037 TEST=plug in USB keyboard while in S0, enter S0ix and verify entry via EC; type on keyboard, verify it wakes up, eventlog contains: 39 | 2020-12-10 09:40:21 | S0ix Enter 40 | 2020-12-10 09:40:42 | S0ix Exit 41 | 2020-12-10 09:40:42 | Wake Source | PME - XHCI (USB 2.0 port) | 1 42 | 2020-12-10 09:40:42 | Wake Source | GPE # | 109 which verifies it still functions for the PCH XHCI controller Change-Id: I9f28354e031e3eda587f4faf8ef7595dce8b33ea Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/47411 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/intel/jasperlake/elog.c | 34 ++++++++++++---------------------- 1 file changed, 12 insertions(+), 22 deletions(-) (limited to 'src/soc/intel/jasperlake/elog.c') diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c index 5d3c69e3fe..cb9625a675 100644 --- a/src/soc/intel/jasperlake/elog.c +++ b/src/soc/intel/jasperlake/elog.c @@ -57,19 +57,6 @@ static void pch_log_rp_wake_source(void) } } -static void pch_log_add_elog_event(const struct pme_map *ipme_map) -{ - /* - * If wake source is XHCI, check for detailed wake source events on - * USB2/3 ports. - */ - if ((ipme_map->devfn == PCH_DEVFN_XHCI) && - pch_xhci_update_wake_event(soc_get_xhci_usb_info())) - return; - - elog_add_event_wake(ipme_map->wake_source, 0); -} - static void pch_log_pme_internal_wake_source(void) { size_t i; @@ -80,10 +67,12 @@ static void pch_log_pme_internal_wake_source(void) { PCH_DEVFN_GBE, ELOG_WAKE_SOURCE_PME_GBE }, { PCH_DEVFN_SATA, ELOG_WAKE_SOURCE_PME_SATA }, { PCH_DEVFN_CSE, ELOG_WAKE_SOURCE_PME_CSE }, - { PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI }, { PCH_DEVFN_USBOTG, ELOG_WAKE_SOURCE_PME_XDCI }, { PCH_DEVFN_CNVI_WIFI, ELOG_WAKE_SOURCE_PME_WIFI }, }; + const struct xhci_wake_info xhci_wake_info[] = { + { PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI }, + }; for (i = 0; i < ARRAY_SIZE(ipme_map); i++) { const struct device *dev = pcidev_path_on_root(ipme_map[i].devfn); @@ -91,20 +80,21 @@ static void pch_log_pme_internal_wake_source(void) continue; if (pci_dev_is_wake_source(dev)) { - pch_log_add_elog_event(&ipme_map[i]); + elog_add_event_wake(ipme_map[i].wake_source, 0); dev_found = true; } } /* - * If device is still not found, but the wake source is internal PME, - * try probing XHCI ports to see if any of the USB2/3 ports indicate - * that it was the wake source. This path would be taken in case of GSMI - * logging with S0ix where the pci_pm_resume_noirq runs and clears the - * PME_STS_BIT in controller register. + * Check the XHCI controllers' USB2 & USB3 ports for wake events. There + * are cases (GSMI logging for S0ix clears PME_STS_BIT) where the XHCI + * controller's PME_STS_BIT may have already been cleared, so the host + * controller wake wouldn't get logged here; therefore, the host + * controller wake event is logged before its corresponding port wake + * event is logged. */ - if (!dev_found) - dev_found = pch_xhci_update_wake_event(soc_get_xhci_usb_info()); + dev_found |= xhci_update_wake_event(xhci_wake_info, + ARRAY_SIZE(xhci_wake_info)); if (!dev_found) elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0); -- cgit v1.2.3