From 4dd34eee092276e47a9be41ff9a51dfcde38d759 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Mon, 2 May 2016 14:31:02 -0700 Subject: soc/intel/quark: Add USB PHY initialization Add register access support using register scripts. Initialize the USB PHY using register scripts. TEST=Build and run on Galileo Gen2 Change-Id: I34a8e78eab3c7314ca34343eccc8aeef0622798a Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/14496 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/intel/quark/Makefile.inc | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/quark/Makefile.inc') diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index d8650fa8b9..3a865b8697 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -19,6 +19,7 @@ subdirs-y += romstage subdirs-y += ../../../cpu/x86/tsc romstage-y += memmap.c +romstage-y += reg_access.c romstage-y += tsc_freq.c romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c @@ -27,9 +28,11 @@ ramstage-y += chip.c ramstage-y += memmap.c ramstage-y += northcluster.c ramstage-y += pmc.c +ramstage-y += reg_access.c ramstage-y += tsc_freq.c ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c +ramstage-y += usb.c CPPFLAGS_common += -I$(src)/soc/intel/quark CPPFLAGS_common += -I$(src)/soc/intel/quark/include -- cgit v1.2.3